This approach requires the modified Richardson constant, A**, to be known for the particular metal/semiconductor junction. As discussed later in section 6.1.1, the slope of an Arrhenius plot (ln[Ite/T2] vs. 1/T) can be used to extract a more accurate value of the fbo. However, this requires that the diode be first characterised at several temperatures.

4.2.1.2 Ideality Factor, n

The diode junction quality is quantified using its ideality factor, n. Again, using the linear fit to region 2 of Figure 4.3 and (eqn. 2.6), this can be expressed as:

4.2.1.3 Series Resistance, Rs

The series resistance is determined from region 3 of Figure 4.3 where at high current, the plot becomes flat and is assumed to be dominated entirely by the Rs. A plot of V/I is made and Rs is extracted from the point where this curve saturates to a steady minimum value.

4.2.2 Bipolar Transistor / HBT Parameter Extraction

The theory of HBTs was dealt with in section 2.4. Since adequate information is available in the literature [125,126] only an overview of the relevant extraction techniques will be provided here.

4.2.2.1 Output Characteristics

This is a series of plots of the collector currents, Ic, as a function of collector-emitter voltage, Vce, at different base currents, Ib. From this plot, it is possible to ascertain the amount of offset voltages, DVceo, between the emitter-base and the base-collector (hetero and homo) junctions; the linearity of gain with Ib; and the presence of base-width modulation amongst other phenomena.

4.2.2.2 Gummel Plot

The simultaneous plot of Ic and Ib vs. the base-emitter voltage, Vbe, on a semi-logarithmic scale is known as a Gummel Plot. This plot is extremely useful in device characterisation because it reflects on the quality of the emitter-base junction while the base-collector bias, Vbc, is kept at a constant; in this study, Vbc = 0. A number of other device parameters can be ascertained either quantitatively or qualitatively directly from the Gummel plot because of its semi-logarithmic nature: the d.c. gain, b; base and collector ideality factors, nIb and nIc; series resistances and leakage currents.

4.2.2.3 D.C. Current Gain, b

The d.c. current gain, b (= Ic/Ib), of a transistor is measured in a common emitter configuration is an important figure of merit for the device. Particularly useful information can be obtained when b is plotted versus the collector current, Ic. Ideally, this should be as flat a curve as possible over a wide range for good devices.

In practice, the gain is limited by leakage currents at low Ic and hence the presence and nature of these leakage currents can be ascertained by a plot of log b vs. log Ic. Similarly, a high collector current densities (> 1e5 Acm-2), the gain is also reduced primarily due to the onset of high injection effects in the base and the Kirk Effect [127]. High injection effects, occurring at the point where the number of electrons injected from the emitter into the base become comparable to native holes in the base, are unlikely to affect HBTs where base dopings, NAB, of 1e19 cm-3 is common. The Kirk Effect refers to gain reduction due to the electron concentration in the collector depletion region becoming comparable to the native collector donor levels, NDC, which affects the electric field in the base-collector junction resulting in an increase of hole injection from the base into the collector; this is also known as "base pushout". In HBTs, the latter effect is minimised by the relative (to homojunction transistors) high collector doping density, NDC.

4.2.2.4 Emitter and Collector Series Resistance, Ree' and Rcc'

The Ree' is measured by connecting the transistor in a common emitter configuration, setting Ic = 0 and varying the Ib, as shown in Figure 4.4.

Figure 4.4: Transistor configuration for measuring emitter series resistance, Ree'

Since Ic = 0, there is no potential drop across Rcc', and hence the entire Vce is dropped across Ree' provided the base-emitter junction is not turned on (i.e. Ib is very low < 5 mA). Ree' is then given the slope of the plot of Ib vs. Vce. Rcc' can be measured by interchanging the emitter and the collector terminals in Figure 4.4.

4.2.3 FET / HEMT Parameter Extraction

4.2.3.1 Transfer Characteristics

This is a series of plots of the drain-source currents, Ids, as a function of drain-source voltage, Vds, at different values of gate bias, Vgs. This plot can be divided into three regions: the linear region where Vds is small compared to the sum of the gate built-in potential, Vbi and Vgs and the channel current responds linearly to an increase in Vds; the triode region at increased Vds where the gate-drain depleting potential, Vgd, is greater than Vgs and the channel current begins to be restricted by this expanded depletion region; the saturation region is where the Vds is sufficiently high to fully deplete the channel and current flow saturated at the value, Idss, when this first occurs.

4.2.3.2 Transconductance, gm

The transconductance is a quantitative measure of an FET device's amplification capability. It is given by differentiating the channel current in the saturated region at a constant Vds. Thus,

4.2.4 Experimental Set-up

The d.c. characterisation set-up essentially consists of a probe station, a Hewlett-Packard HP4145B Semiconductor Parameter Analyser (SPA) and an IBM compatible personal computer (PC). The probe station is connected to the SPA via a set of BNC cables enabling the measurement of a number of d.c. parameters. Devices packaged on T05 transistor headers can be characterised using an appropriate box equipped with BNC sockets. The SPA is in turn connected to the PC by an IEEE interface allowing data transfer. A schematic of the set- up is shown in Figure 4.5:

Figure 4.5: Schematic diagram of I-V measurement and data transfer set-up

The SPA is designed to be a fully automatic high performance and versatile test instrument capable of measuring, analysing and graphically displaying d.c. characteristics of a wide range of semiconductor devices. It has four programmable voltage source/monitor ports (SMU), two programmable voltage source ports (Vs) and two voltage monitor ports (Vm). Each SMU can be programmed to operate in one of three modes:

1. voltage source or current monitor (V)
2. current source or voltage monitor (I)
3. common ground (COM)

Thus appropriate programming of the SMUs involving sweeping the voltage/current or holding these at a constant value enables the user to perform a wide range of operations on the device under test. The maximum current which can be sourced from the SPA is 100mA while the minimum measurable current is 5e-13A lending itself to good use for most d.c. parameter extractions.

The HP4145B SPA also has a 3.5 inch floppy disk drive which can be used for storing measured data, programs and auto sequences. The data is stored as ASCII text and can be easily transferred into the PC through the IEEE interface at the rear. Programs are usually a set of instructions entered by the user defining the SMU mode and its limit, the graphical display screen and the axis. An auto sequence, as its name implies, is a series of programs or functions which are automatically carried out by the instrument once it is started by the user. Thus for a HBT, an auto sequence can be written to measure, display and save the output, the gain, the Gummel plot, the individual junction characteristics and the collector and emitter series resistances respectively with the press of a single button. Time delays can also be incorporated into an auto sequence rendering the SPA into a very powerful and indispensable tool.