In case of a n-type Schottky junction, the above equation can be simplified to (eqn. 4.23). This is also appropriate for the analysis of a p-n junction where the p-region is very highly doped in comparison to the n-region, for example in the base-emitter or base-collector junctions of a N-p-n HBT. In these conditions, the application of a reverse bias is assumed to have no significant effect on the base width.

Substituting (eqn. 4.23) into (eqn. 4.24) yields:

The x-axis intercept of (eqn. 4.26) yields the built-in potential, Vbi.

The doping profile for the semiconductor wafer, i.e. a plot of the doping concentration versus the distance from the junction, can be derived using one of two possible sets of equations. Firstly, the depletion width (corresponding to a measured capacitance value or applied bias) can be calculated from either (eqn. 4.24) or (eqn. 4.23); the use of (eqn. 4.23), however, requires Vbi to be determined using the intercept of (eqn. 4.26). Secondly, the doping concentration, ND, (corresponding to a measured capacitance value) can be determined using either one of the following equations:

Whereas the derivation of (eqn. 4.27) is by differentiation of (eqn. 4.26) with respect to Vapp, and necessary substitutions, (eqn. 4.28) can be derived by differentiating (eqn. 4.25) with respect to Vapp. These derivations are presented in Appendix D1. The relative practical benefits of choosing between the two possible sets of equations when plotting the doping profile is discussed in section 4.3.3.

4.3.2 Experimental Set-up

The experimental set-up for the C-V measurement system consists of a probe station, a Hewlett-Packard HP4284A precision LCR meter with HP16048A test leads and a PC interfaced with the appropriate GPIB cable and IEEE interface card. The device under test is placed on the probe station and connected to the LCR meter via the test leads.

Figure 4.6: Photograph of the C-V measurement system

A dedicated driver software, developed at King's College, resident in the PC is used to control the various functions of the LCR meter. In addition to C-V measurements over a wide range of bias and test frequencies, the HP4284A LCR meter is also capable of measuring the series resistance and any inductance present in the device being tested. The frequency range for the test signal is 10kHz to 1MHz and the latter setting is used for all the measurements in this study. The shape of the test signal can also be varied from the usual sine wave to a ramp and triangular wave to study the effects of hysterisis loops. The measured data is saved directly in the PC and later analysed using external software.

4.3.3 Limitations

C-V measurements suffer from a number of fundamental limitations [132]. These include the total depth which can be profiled before the onset of avalanche breakdown on the semiconductor material and the validity of the depletion approximation. In a GaAs sample, where the maximum sustainable field is approximately 4e5 Vm-1, this depth varies between 0.02mm and 20mm for ND = 1e18 cm-3 and 1e15 cm-3 respectively. This limit can be significantly extended at the cost of destroying the sample by using an electrolytic Schottky barrier and etching through it while making CV measurements. However, the two requirements for the depletion approximation, that the depletion region be free from mobile charge and have an abrupt boundary, are harder to fulfill in practice.

As seen from (eqn. 4.24) to (eqn. 4.28), accurate knowledge of the junction area is crucial to CV measurements. In addition, they are also vulnerable to erroneous interpretation particularly due to series resistance and parasitic capacitance [133] as well as those arising from the device geometry [134]. Undetected bias independent parasitic capacitance is particularly misleading when analysing small geometry devices where the perimeter/area ratio may be large; this is because while the peripheral parasitic capacitance proportional to the perimeter, the junction capacitance is proportional to the diode area.